Owing to the progress of semiconductor packaging technology and improvements in performances of electrical characteristics for semiconductor chips, semiconductor devices are developed to higher integration. In exemplification of a BGA (ball grid array) semiconductor package, a plurality of array-arranged solder balls are mounted on a bottom surface of a substrate and used as input/output (I/O) connections for electrically connecting a semiconductor chip mounted on the substrate to an external device such as printed circuit board (PCB). Compared to a conventional lead-frame based semiconductor device, the BGA configuration provides more I/O connections on a unit area of a chip carrier such as substrate, thereby improving trace routability on the chip carrier and allowing more semiconductor chips to be incorporated in the package.
In accordance with high integration of the semiconductor device, more leads and circuits are required, which may increase the occurrence of noise. Generally, passive components such as resistors, capacitors and inductors are incorporated in the semiconductor device in order to eliminate the noise and achieve the requirements for electrical characteristics of the semiconductor device.
The passive components are normally mounted on the substrate at area unoccupied by mounting semiconductor chip. This thereby requires a relatively large substrate and undesirably enlarges overall dimensions of the semiconductor device; moreover, mounting the passive components respectively on the substrate also increases complexity of circuit arrangement and fabrication for the semiconductor device. As shown in FIG. 1, a plurality of passive components 12 are disposed on a surface of a substrate 1 that can be a printed circuit board or a packaging substrate for accommodating semiconductor chips. In order to prevent the passive components 12 from affecting electrical connection between a semiconductor chip 11 and a plurality of bond fingers formed on the substrate 1, conventionally, the passive components 12 are situated at corner positions on the substrate 1 or at area free of mounting the semiconductor chip 11; this thereby confines flexibility of trace routability on the substrate 1, making the number of passive components 12 undesirably limited. Therefore, if the above conventional arrangements were employed to incorporate more semiconductor chips 11 and passive components 12 on the substrate 1 necessarily to achieve enhanced performances of the semiconductor device, it would not only increase fabrication complexity but also significantly enlarge the dimensions of the semiconductor device, thereby not facilitating dimensions miniaturization of semiconductor packages.
Furthermore, in response to enhanced functionality and lower dimensions of electronic products, lamination technology needs to be improved for fabricating circuit boards with smaller thickness, a larger number of layers and higher density. Therefore, in order to make the circuit boards more compact in dimensions, multilayer circuit boards embedded with passive components are developed in which the passive components are mounted in the form of films in the multi-layer circuit boards.
The multi-layer circuit boards integrated with various films of passive components can have different configurations. As shown in FIG. 2A, a resistive film 20 is embedded in a multi-layer circuit board 2a and formed over an electrically conductive layer 21. The resistive film 20 is composed of thick film materials and thin film resistive materials, wherein the thick film materials include silver powders or carbon particles dispersed in a resin, and ruthenium oxide (RuO2) and glass powders dispersed in a binder to be coated and cured, and the thin film materials include alloys such as nickel-chromium (Ni—Cr) alloy, nickel-phosphorus (Ni—P) alloy, nickel-tin (Ni—Sn) alloy, chromium-aluminum (Cr—Al) and titanium nitride (TaN) alloy to be applied by sputtering, electroplating or electroless plating technique. The resistive film 20 and electrically conductive layer 21 are patterned to form resistors 20a. The patterned electrically conductive layer 21 is partly used as resistor electrodes 21a to thereby accomplish a multi-layer circuit board with embedded resistors. Similarly, as shown in FIG. 2B, as to integrating and embedding a capacitive film 22 in a multilayer circuit board 2b, a dielectric layer with a high dielectric constant is used as the capacitive film 22 made of for example, polymeric materials, ceramic materials, polymers formed by ceramic powders and the like, such as barium titanate, lead zirconate titanate, amorphous hydrogenated carbon, or powders thereof dispersed in a binder which can be shaped by printing or roller coating technique. Electrically conductive layers 21 formed over opposite surfaces of the capacitive film 22 are patterned and partly used as parallel sheets 21b for capacitors 22a so as to form a multi-layer circuit board with embedded capacitors.
Materials and method for forming passive components such as resistors and capacitors in a laminated circuit board are highly expected; the key point is how to incorporate and embed these passive components in the circuit board. Related prior art references include for example, U.S. Pat. Nos. 3,857,683, 5,243,320 and 5,683,928, to name just a few, most of which is to form passive components such as resistors on an organic insulating layer by means of a printing and/or photoresistetching technique before fabricating a new laminate for a multi-layer circuit board. However, due to surface roughness of the organic insulating layer beneath the passive components, it would be hard to achieve desirable electrical accuracy; or if the organic insulating layer is excessively smooth, adhesion between the passive components and the insulating layer is weakened, which may degrade reliability of the circuit board. Further, the above method of forming the passive components would undesirably increase fabrication costs and process complexity of the circuit board.
In addition, although the multi-layer circuit board with embedded films of passive components can solve the aforementioned problems of restriction on trace routability of the circuit board, it still renders a drawback of requiring complex fabrication processes. Besides, since the passive components reside between laminations of the circuit board, in compliance with different requirements for electrical characteristics such as resistance and capacitance, the multi-layer circuit board needs to be designed and laminated again, which would significantly increase fabrication costs and bring about difficulties in managing material stocks.
Therefore, the problem to be solved herein is to provide an integrated library core for embedded passive components, which can be used in a semiconductor device or electronic device to enhance performances of electrical characteristics without affecting trace routability and fabrication costs of the semiconductor device or electronic device.